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insns: fix CCMP immediate template ordering and add CTEST reg, mem symmetry - #322

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agourakis82:fix/ccmp-ctest-apx
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agourakis82 wants to merge 2 commits into
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agourakis82:fix/ccmp-ctest-apx

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Fixes #316.
Fixes #317.

Summary

  1. Fix CCMP 8-bit immediate ordering (Bug in CCMP [mem], word imm #316):
    In x86/insns.dat, CCMPscc previously declared the $wdq sbyte# template (opcode 83 /7) before the $bwdq imm# template (opcode 80# /7).
    For an instruction like:

    ccmpb {dfv=} [rsp], byte 10

    the explicit byte immediate (BITS8) matched sbyteword16 via the BYTEEXTMASK promotion logic in asm/assemble.c. Because [rsp] carried no explicit size specifier, SM1-2 matched both operands to 16 bits, incorrectly choosing the word template (83 /7) instead of the 8-bit template (80 /7).
    Placing rm8, imm8 ahead of $wdq sbyte# (matching the template ordering of classic CMP) ensures 8-bit comparisons assemble to the correct 8-bit opcode (80 /7).

  2. Add CTEST reg, mem symmetry (Possible syntactic sugar for CTEST reg, mem that is missing #317):
    Added the symmetric template:

    $bwdq CTESTscc spec4,reg#,mem# [wrm: evex.scc.dfv.l0.m4.o# 84# /r] APX,SM1-2,ND
    

    with ND (No Disassembly), matching the existing syntactic sugar in legacy TEST reg#,mem# and allowing instructions like:

    ctestb {dfv=} rax, [rsp]

    to assemble cleanly into the canonical 84 /r encoding.

…mmetry

Fixes netwide-assembler#316.
Fixes netwide-assembler#317.

1. In x86/insns.dat, CCMPscc declared the $wdq sbyte# template (opcode 83 /7)
   before the $bwdq imm# template (opcode 80# /7). For an instruction like:
       ccmpb {dfv=} [rsp], byte 10
   the explicit byte immediate (BITS8) matched sbyteword16 via BYTEEXTMASK
   promotion in asm/assemble.c. Because [rsp] carried no explicit size,
   SM1-2 matched both operands to 16 bits, choosing the word template (83 /7)
   instead of the 8-bit template (80 /7).
   Placing rm8, imm8 before $wdq sbyte# (matching classic CMP ordering) ensures
   8-bit comparisons assemble to 8-bit form.

2. Added symmetric $bwdq CTESTscc spec4,reg#,mem# [wrm: evex... 84# /r] with ND,
   matching the existing syntactic sugar of legacy TEST reg#,mem#.
Copilot AI lite review requested due to automatic review settings September 23, 2026 23:22

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Copilot review overview

🟡 Changes recommended

Add regression fixtures covering the unsized-memory CCMP form and CTEST reg, mem syntax.

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Review effort: Lite
Findings: 2 Low severity

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What changed in this PR

Updates APX instruction templates to fix CCMP immediate encoding selection and add symmetric CTEST register/memory syntax.

Changes:

  • Prioritizes the 8-bit CCMP immediate encoding.
  • Restricts wider CCMP immediate forms appropriately.
  • Adds the CTEST reg, mem alias using canonical 84 /r.
File Description
x86/​insns.dat Updates CCMP template ordering and adds CTEST operand symmetry.

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Comment thread x86/insns.dat
Comment thread x86/insns.dat
@LinuxCoder13

LinuxCoder13 commented Sep 24, 2026 •

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Yea, much more will be interesting to add syntax sugar for CMOV/CFCMOV, as this hack requiers to change logic not only in x86/insns.dat but also asm/assemble.c, mainly to inverse the condition (sc ^ 1)

@agourakis82

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Follow-up regression fixtures are now included in 6d9804c4d: apx-ccmpscc covers the unsized memory operand with explicit byte immediate, and apx-ctestscc covers CTEST reg, mem operand-order symmetry using the canonical 84 /r encoding. Could you please re-review when convenient?

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Possible syntactic sugar for CTEST reg, mem that is missing Bug in CCMP [mem], word imm

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