Additional ARM Neon SIMD optimizations and undefined behavior fix - #141
Additional ARM Neon SIMD optimizations and undefined behavior fix#141samyron wants to merge 1 commit into
Conversation
…kups (vqtbl4q_u8) instead of direct character compares and a logical OR reduction. Additionally, this commit fixes a shift-by-64 undefined behavior when a match lands on the last lane of a block. Depending on where the index lands, at best the string is escaped incorrectly, at worst it cases a segmentation fault: ``` => true irb(main):002> corrupt = "a" * 15 + "<" + "a" * 20 => "aaaaaaaaaaaaaaa<aaaaaaaaaaaaaaaaaaaa" irb(main):003> actual = ERB::Util.html_escape(corrupt) => "aaaaaaaaaaaaaaa<aaaaaaaaaaaaaaa&ruby#39;aaaa" irb(main):004> crash = "a" * 15 + ">" + "a" * 15 # 31 bytes => "aaaaaaaaaaaaaaa>aaaaaaaaaaaaaaa" irb(main):005> ERB::Util.html_escape(crash) (irb):5: [BUG] Segmentation fault at 0x00000001230affe9 ``` This was run on a Macbook Air M1. ``` == 1k no matches == ruby 3.4.8 (2025-12-17 revision 995b59f666) +PRISM [arm64-darwin24] Warming up -------------------------------------- sm/neon-vtbl 1.191M i/100ms Calculating ------------------------------------- sm/neon-vtbl 11.896M (± 0.6%) i/s (84.06 ns/i) - 59.546M in 5.005745s Comparison: master: 9406864.5 i/s sm/neon-vtbl: 11895905.7 i/s - 1.26x faster == 1k few matches == ruby 3.4.8 (2025-12-17 revision 995b59f666) +PRISM [arm64-darwin24] Warming up -------------------------------------- sm/neon-vtbl 277.531k i/100ms Calculating ------------------------------------- sm/neon-vtbl 2.722M (± 1.7%) i/s (367.34 ns/i) - 13.877M in 5.098968s Comparison: master: 1485804.8 i/s sm/neon-vtbl: 2722269.4 i/s - 1.83x faster == 1k many matches == ruby 3.4.8 (2025-12-17 revision 995b59f666) +PRISM [arm64-darwin24] Warming up -------------------------------------- sm/neon-vtbl 178.565k i/100ms Calculating ------------------------------------- sm/neon-vtbl 1.787M (± 1.1%) i/s (559.45 ns/i) - 9.107M in 5.095378s Comparison: master: 1462148.5 i/s sm/neon-vtbl: 1787482.0 i/s - 1.22x faster ```
|
I understand if you desire to keep the SIMD implementations the same between SSE2 and Neon. However, ARM provides table lookup instructions which are very convenient for this use case. Even better that every character that needs to be escaped is less than 64 so we can use a single This is the relevant assembly on The generated assembly on this branch: I also think the benchmark for |
|
It looks like @byroot already fixed the undefined behavior. I can rebase this branch. |
I mean, it was a nice property, but I'm not dead set on it. |
|
Let me know when it's rebased. |
Further optimize the NEON SIMD escape path using vectorized table lookups (vqtbl4q_u8) instead of direct character compares and a logical OR reduction.
Additionally, this commit fixes a shift-by-64 undefined behavior when a match lands on the last lane of a block. Depending on where the index lands, at best the string is escaped incorrectly, at worst it cases a segmentation fault:
This was run on a Macbook Air M1.